A resistance change memory such as a spin-transfer-torque magnetic random access memory (STT-MRAM) has memory cells, each including, for instance, a resistance change element and a select transistor. For example, a planar field-effect transistor or a fin (cubic) field-effect transistor (FET) may be used as a select transistor.
Especially a fin field-effect transistor (fin-FET) has a fin-shaped active area where each of the upper surface and the side surfaces can be used as a channel area. Accordingly, even if a transistor is miniaturized, comparatively large driving force (channel width) will be secured. Therefore, a fin-FET is considered to be advantageous to integration.
However, the use of a transistor, such as a fin-FET, as a select transistor in a memory cell of a resistance change memory, such as an STT-MRAM, provokes a problem that, even if a transistor such as a fin-FET is miniaturized, the area of a memory cell cannot be made sufficiently small unless a word line, a bit line, and a source line, each connected to a memory cell, are appropriately laid out.